Invention Grant
- Patent Title: Semiconductor structure and method of manufacturing the same
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Application No.: US17653658Application Date: 2022-03-07
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Publication No.: US11950408B2Publication Date: 2024-04-02
- Inventor: Chiang-Lin Shih , Hsueh-Han Lu , Yu-Ting Lin
- Applicant: NANYA TECHNOLOGY CORPORATION
- Applicant Address: TW New Taipei
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW New Taipei
- Agency: CKC & Partners Co., LLC
- Main IPC: H10B12/00
- IPC: H10B12/00

Abstract:
A method of manufacturing a semiconductor structure is provided. A conductive layer is formed on a precursor memory structure. A target layer is formed on the conductive layer. A first photoresist with a first opening is formed on the target layer. A spacer is formed on sidewalls of the first opening. A second photoresist with a second opening is formed on the target layer and the spacer. The target layer is patterned by the second photoresist and the spacer to form a first patterned target layer. A third photoresist with a third opening is formed on the first patterned target layer. The first patterned target layer is patterned by the third photoresist to form a second patterned target layer. The conductive layer is patterned by the second patterned target layer to form a patterned conductive layer including a ring structure aligned with a source/drain region.
Public/Granted literature
- US20230284437A1 SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2023-09-07
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