A semiconductor memory device includes a first chip having a peripheral transistor and a first insulating layer, and includes a second chip having a stacked structure and a second insulating layer. The stacked structure includes conductive patterns and insulating patterns alternately stacked with each other, the first insulating layer includes a first bonding surface, the second insulating layer includes a second bonding surface contacting the first bonding surface, and the second chip further includes a protrusion protruding from the second bonding surface of the second insulating layer toward the first insulating layer.