Invention Grant
- Patent Title: Area-efficient, reconfigurable, energy-efficient, speed-efficient neural network substrate
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Application No.: US15400319Application Date: 2017-01-06
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Publication No.: US11295204B2Publication Date: 2022-04-05
- Inventor: Dharmendra S. Modha
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Foley Hoag, LLC
- Agent Erik A. Huestis; Stephen J. Kenny
- Main IPC: G06N3/06
- IPC: G06N3/06 ; G06N3/063 ; G06N3/04

Abstract:
Architectures for multicore neuromorphic systems are provided. In various embodiments, a neural network description is read. The neural network description describes a plurality of logical cores. A plurality of precedence relationships are determined among the plurality of logical cores. Based on the plurality of precedence relationships, a schedule is generated that assigns the plurality of logical cores to a plurality of physical cores at a plurality of time slices. Based on the schedule, the plurality of logical cores of the neural network description are executed on the plurality of physical cores.
Public/Granted literature
- US20180197075A1 AREA-EFFICIENT, RECONFIGURABLE, ENERGY-EFFICIENT, SPEED-EFFICIENT NEURAL NETWORK SUBSTRATE Public/Granted day:2018-07-12
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