Area-efficient, reconfigurable, energy-efficient, speed-efficient neural network substrate
Abstract:
Architectures for multicore neuromorphic systems are provided. In various embodiments, a neural network description is read. The neural network description describes a plurality of logical cores. A plurality of precedence relationships are determined among the plurality of logical cores. Based on the plurality of precedence relationships, a schedule is generated that assigns the plurality of logical cores to a plurality of physical cores at a plurality of time slices. Based on the schedule, the plurality of logical cores of the neural network description are executed on the plurality of physical cores.
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