A monitor circuit is configured to receive sensor data samples at a first bit rate. The monitor circuit includes a sensor data processing circuit that is coupled to a sensor node and is configured to generate a sensor data characteristic signal for each sensor data sample. The sensor data characteristic signal for a particular sensor data sample indicates a value of a monitored parameter of the particular sensor data sample. The monitor circuit also includes a fault trigger circuit configured to determine, based on the sensor data characteristic signal, whether the sensor data samples satisfy a fault trigger. The monitor circuit further includes a summarization circuit configured to generate a sensor data summary signal based on the sensor data characteristic signal. The sensor data summary signal is provided to a summary output node at a second bit rate that is less than the first bit rate.