Invention Grant
- Patent Title: Semiconductor device with self-aligned carbon nanotube gate
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Application No.: US16547948Application Date: 2019-08-22
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Publication No.: US10943786B2Publication Date: 2021-03-09
- Inventor: Qing Cao , Shu-Jen Han , Ning Li , Jianshi Tang
- Applicant: ELPIS TECHNOLOGIES INC.
- Applicant Address: CA Ottawa
- Assignee: ELPIS TECHNOLOGIES INC.
- Current Assignee: ELPIS TECHNOLOGIES INC.
- Current Assignee Address: CA Ottawa
- Agency: VanTek IP LLP
- Agent Shin Hung
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L29/49 ; H01L29/66 ; H01L29/51 ; H01L21/265 ; H01L29/08 ; H01L29/78 ; H01L21/3205 ; B82Y10/00 ; H01L29/40 ; H01L29/775 ; H01L29/06

Abstract:
A method of forming a semiconductor device includes forming a channel layer on a substrate. A gate dielectric is deposited on the channel layer, and a mask is patterned on the gate dielectric. An exposed portion of the gate dielectric is removed to expose a first source/drain region and a second source/drain region of the channel layer. A first source/drain contact is formed on the first source/drain region and a second source/drain contact is formed on the second source/drain region. A cap layer is formed over the first source/drain contact and the second source/drain contact, and the mask is removed. Spacers are formed adjacent to sidewalls of the first source/drain contact and the second source/drain contact. An oxide region is formed in the cap layer and a carbon material is deposited on an exposed portion of the gate dielectric.
Public/Granted literature
- US20190385854A1 SEMICONDUCTOR DEVICE WITH SELF-ALIGNED CARBON NANOTUBE GATE Public/Granted day:2019-12-19
Information query
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