Invention Grant
- Patent Title: Semiconductor integrated circuit
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Application No.: US16557851Application Date: 2019-08-30
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Publication No.: US10763849B2Publication Date: 2020-09-01
- Inventor: Masahisa Iida
- Applicant: Socionext Inc.
- Applicant Address: JP Kanagawa
- Assignee: SOCIONEXT INC.
- Current Assignee: SOCIONEXT INC.
- Current Assignee Address: JP Kanagawa
- Agency: McDermott Will & Emery LLP
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@653078ec
- Main IPC: H03K17/16
- IPC: H03K17/16

Abstract:
A semiconductor integrated circuit includes: a power supply terminal that receives a power supply voltage; an external terminal; an output PMOS transistor connected between the power supply terminal and the external terminal; an auxiliary PMOS transistor connected between a gate of the output PMOS transistor and the external terminal; and a bias voltage generating circuit connected to a gate of the auxiliary PMOS transistor. The bias voltage generating circuit supplies a voltage lower than the power supply voltage to the gate of the auxiliary PMOS transistor, if it is necessary to maintain an OFF state of the output PMOS transistor by supplying an external voltage received at the external terminal to the gate of the output PMOS transistor.
Public/Granted literature
- US20190386653A1 SEMICONDUCTOR INTEGRATED CIRCUIT Public/Granted day:2019-12-19
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