Invention Grant
- Patent Title: Memory system with low read power
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Application No.: US15603478Application Date: 2017-05-24
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Publication No.: US10090027B2Publication Date: 2018-10-02
- Inventor: Po-Ching Wu
- Applicant: eMemory Technology Inc.
- Applicant Address: TW Hsin-Chu
- Assignee: eMemory Technology Inc.
- Current Assignee: eMemory Technology Inc.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G11C7/06 ; G11C7/22 ; G11C7/12

Abstract:
A memory system includes a first memory bank, a first path selector, a second memory bank, a second path selector, and a sensing device. The first memory bank includes a plurality of first memory cells. The second memory bank includes a plurality of second memory cells. The first path selector includes a plurality of input terminals coupled to the first memory cells through a plurality of first bit lines, and two output terminals. The second path selector includes a plurality of input terminals coupled to the second memory cells through a plurality of second bit lines, and two output terminals. The sensing device is coupled to the output terminals of the first bank selector and the second bank selector, and senses the difference between currents outputted from two of the reference current source, and the terminals of the two bank selectors according to the required operations.
Public/Granted literature
- US20170345464A1 MEMORY SYSTEM WITH LOW READ POWER Public/Granted day:2017-11-30
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