Abstract:
A readout apparatus for a current type touch panel is provided. The readout apparatus includes a current-to-voltage converter, a voltage gain unit and an analog-to-digital converter (ADC). The current-to-voltage converter converts a sensing current of the current type touch panel to a sensing voltage. The current-to-voltage converter includes a resistor and a current mirror. The resistor has a first end and a second end. The current mirror has a master current end and a slave current end. An input end of the voltage gain unit is coupled to an output end of the current-to-voltage converter for receiving the sensing voltage. An input end of the ADC is coupled to an output end of the voltage gain unit. An output end of the ADC generates a digital code.
Abstract:
A data transmission method for transmitting data between a timing controller and a source driver of a display and a display using the same are disclosed. The transmission method includes recognizing a start of a blank period of a frame period; sampling de-skew data on a data bus during the blank period based on a data clock; performing a de-skew function by comparing the sampled de-skew data with a predetermined de-skew code and adjusting the data clock; recognizing a start of a data input period of the frame period; and sampling pixel data on the data bus during the data input period based on the adjusted data clock. The display includes a timing controller, a data bus, and a source driver. The source driver is connected to the timing controller via the data bus for performing the data transmission method.
Abstract:
A data transmitting method for inputting a data signal to an electronic device. The data signal includes first and second sets of data, and the electronic device includes first to fourth receiving units and corresponding first to fourth registers. The transmitting method includes the following steps. First, the first and second receiving units are disabled. Then, the first set of data is inputted to the electronic device through the third and fourth receiving units and stored in the third and fourth registers during a first clock cycle of a clock signal. Thereafter, the second set of data is inputted to the electronic device through the third and fourth receiving units and stored in the third and fourth registers while the first set of data stored in the third and fourth registers is inputted to the first and second registers during a second clock cycle of the clock signal.
Abstract:
A wire-on-array (WOA) flat panel display is provided. The wire-on-array (WOA) flat panel display is characterized in a plurality of high input impedance components between the flexible printed circuit (FPC) board and the corresponding source driver circuits. Each of the high input impedance components is able to receive gamma voltages with little input current and then transmit the gamma voltages to each of the source driver circuit for production of source voltages of little banding effect.
Abstract:
A wafer and a test method thereof are provided. The invention utilizes a first group of probes to perform a high voltage stress (HVS) test on a first chip, and utilizes a second group of probes to perform a function test on a second chip, where a period of the high voltage stress test overlaps a period of the function test, thereby greatly decreasing the test time of the wafer.
Abstract:
The invention relates to a signal driving system for a display. The signal driving system comprises: a signal controller, a flexible connector and a plurality of driving devices. The signal controller is used to produce a first control signal. The flexible connector is connected to the signal controller, and used to receive the first control signal. One of the driving devices is connected to the flexible connector. The driving devices connect in cascade. Each driving device comprises a data input port, a data output port and a driving signal output port. The data input port receives the first control signal or a second control signal. The data output port outputs the second control signal. According to the first control signal or the second control signal, the driving signal output port transmits a driving signal. The signal driving system of the invention can make the data output port of the driving device transmit the second control signal to the next driving device. Therefore, the signal driving system of the invention can resolve the problem between different control signals of different circuit interfaces. Besides, the signal driving system of the invention has the advantage of processing the first control signal in the signal controller and transmitting the second control signal between the driving devices.
Abstract:
An output buffer and a controlling method are disclosed. The output buffer comprises an upper buffer and a lower buffer. In the controlling method, at first, a first voltage (V1) and a second voltage (V2) are applied on the upper buffer, and a third voltage (V3) and a fourth voltage (V4) are applied on the lower buffer, wherein V1>V2, V1>V4, V3>V2, and V3>V4. Then, the upper buffer is operated to output data to a plurality of pixels thereby operating the liquid crystals of the pixels over an upper supply range, wherein the upper supply range is from V1 to V2. Thereafter, the lower buffer is operated to output data to the pixels thereby operating the liquid crystals of the pixels over a lower supply range, wherein the lower supply range is from V3 to V4.
Abstract:
A liquid crystal display (LCD) includes a controller, a source driver, first and second data lines and a data transmission path. The controller outputs first and second image data, and the source driver receives and outputs the first and second image data. The source driver includes first and second data channel circuits and a first repair channel circuit. The first and second data channel circuits respectively output first and second sub-pixel data. The first repair channel circuit is coupled to the controller to receive first repairing data. The first and second data lines are respectively coupled to the first and second data channel circuits to receive the first and second sub-pixel data. The data transmission path includes a redundant line, which is for coupling the first repair channel circuit to one of the first and second data lines, and interlaces with the first and second data lines.
Abstract:
A power saving method of a chip-on-glass liquid crystal display. The method first (a) wakes up the source drivers of the LCD and (b) transmitting the image data and control signals from the source driver corresponding to the FPC to the farthest waked source drivers, and then switching them to power-saving mode. Steps (b) and (c) are repeated until all the source drivers are switched to power-saving mode.
Abstract:
A DAC has an N-bit R-string DAC section and an (M-N)-bit interpolation DAC section. The N-bit R-string DAC section has a plurality of resistors and a 2-of-N selector. The resistors are electrically connected in series to provide a plurality of voltage levels. The 2-of-N selector is coupled to the series-connected resistors, and is arranged to select two neighboring voltage levels according to an N-bit MSB subword. The (M-N)-bit interpolation DAC section is coupled to the N-bit R-string DAC section, and is arranged to interpolate an analog output signal from the two neighboring voltage levels according to an (M-N)-bit LSB subword.