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公开(公告)号:CN102881666B
公开(公告)日:2015-07-08
申请号:CN201210295014.1
申请日:2012-08-17
Applicant: 香港应用科技研究院有限公司
IPC: H01L23/31 , H01L23/488 , H01L27/146 , H01L21/56
CPC classification number: H01L27/14618 , H01L23/3114 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/19 , H01L24/20 , H01L24/32 , H01L24/81 , H01L24/92 , H01L24/94 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L27/14632 , H01L27/14687 , H01L2224/03464 , H01L2224/0401 , H01L2224/04105 , H01L2224/05155 , H01L2224/05644 , H01L2224/10156 , H01L2224/1132 , H01L2224/1182 , H01L2224/1183 , H01L2224/11849 , H01L2224/12105 , H01L2224/131 , H01L2224/13147 , H01L2224/1319 , H01L2224/13565 , H01L2224/1369 , H01L2224/16106 , H01L2224/16108 , H01L2224/16148 , H01L2224/16157 , H01L2224/16168 , H01L2224/16225 , H01L2224/16227 , H01L2224/16238 , H01L2224/17181 , H01L2224/2101 , H01L2224/211 , H01L2224/214 , H01L2224/215 , H01L2224/32225 , H01L2224/73203 , H01L2224/81191 , H01L2224/81192 , H01L2224/81193 , H01L2224/81447 , H01L2224/81801 , H01L2224/8185 , H01L2224/81895 , H01L2224/9202 , H01L2224/92222 , H01L2224/92224 , H01L2224/94 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06555 , H01L2225/06589 , H01L2924/10156 , H01L2924/12042 , H01L2924/00012 , H01L2924/014 , H01L2924/0665 , H01L2924/00014 , H01L2224/81 , H01L2224/03 , H01L2224/11 , H01L2224/19 , H01L21/78 , H01L2924/00
Abstract: 本发明提供一种晶圆级封装的半导体器件,整个封装器件形成后才分离成单个器件。该半导体器件封装包括半导体芯片,有一个或多个焊盘与该芯片连接,还有一保护层连接在该半导体芯片之上。至少在半导体芯片的侧边缘和底表面上有一隔离层。有互连金属化凸点靠近该半导体芯片的一个或多个侧边缘,并电连接到至少一个焊盘上。一个小型化的图像传感器可以和数字信号处理器和存储器芯片以及透镜和保护盖垂直集成在一起。
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公开(公告)号:CN102656686B
公开(公告)日:2015-07-08
申请号:CN201080059434.9
申请日:2010-12-07
Applicant: 英特尔公司
Inventor: J.古泽克
IPC: H01L23/485
CPC classification number: H01L25/0657 , H01L21/568 , H01L21/6835 , H01L23/3114 , H01L23/49816 , H01L23/49822 , H01L23/49838 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/82 , H01L25/105 , H01L25/16 , H01L2221/68359 , H01L2223/6677 , H01L2224/04105 , H01L2224/12105 , H01L2224/19 , H01L2224/2101 , H01L2224/2105 , H01L2224/221 , H01L2224/821 , H01L2224/8234 , H01L2224/8236 , H01L2225/0652 , H01L2225/06548 , H01L2225/1052 , H01L2225/1058 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/1815 , H01L2924/18162 , H01L2924/3511 , H01L2924/00
Abstract: 描述形成微电子封装结构的方法以及由此形成的相关联的结构。那些方法可包括:在镀覆材料中形成空腔以容纳管芯;在空腔中附着管芯;相邻于管芯形成电介质材料;在与管芯相邻的电介质材料中形成通路;在通路中形成PoP岛;在通路中形成互连;然后去除镀覆材料以暴露PoP岛和管芯,其中管芯设置在PoP岛上。
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公开(公告)号:CN103515252A
公开(公告)日:2014-01-15
申请号:CN201310158510.7
申请日:2013-05-02
Applicant: 新科金朋有限公司
IPC: H01L21/56 , H01L21/60 , H05K3/34 , H01L23/31 , H01L23/538
CPC classification number: H01L23/49827 , H01L21/4853 , H01L21/56 , H01L21/561 , H01L21/568 , H01L21/78 , H01L23/3114 , H01L23/3121 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/49822 , H01L23/5389 , H01L23/562 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/19 , H01L24/20 , H01L24/24 , H01L24/27 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/82 , H01L24/83 , H01L24/85 , H01L24/92 , H01L24/94 , H01L24/97 , H01L25/03 , H01L25/50 , H01L2224/0401 , H01L2224/04042 , H01L2224/04105 , H01L2224/05082 , H01L2224/05611 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/06131 , H01L2224/06133 , H01L2224/1132 , H01L2224/11334 , H01L2224/1134 , H01L2224/1145 , H01L2224/11462 , H01L2224/11464 , H01L2224/11849 , H01L2224/11901 , H01L2224/12105 , H01L2224/131 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/16225 , H01L2224/2101 , H01L2224/215 , H01L2224/2401 , H01L2224/24011 , H01L2224/2402 , H01L2224/245 , H01L2224/27334 , H01L2224/32225 , H01L2224/32245 , H01L2224/45147 , H01L2224/48091 , H01L2224/48225 , H01L2224/48227 , H01L2224/48245 , H01L2224/48247 , H01L2224/48811 , H01L2224/48824 , H01L2224/48839 , H01L2224/48844 , H01L2224/48847 , H01L2224/48855 , H01L2224/73253 , H01L2224/73265 , H01L2224/73267 , H01L2224/81191 , H01L2224/82101 , H01L2224/82104 , H01L2224/82106 , H01L2224/83132 , H01L2224/83191 , H01L2224/83192 , H01L2224/83856 , H01L2224/85411 , H01L2224/85424 , H01L2224/85439 , H01L2224/85444 , H01L2224/85447 , H01L2224/85455 , H01L2224/92147 , H01L2224/92244 , H01L2224/92247 , H01L2224/94 , H01L2224/97 , H01L2924/00011 , H01L2924/01322 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/3025 , H01L2924/3511 , H01L2924/3512 , H01L2924/00014 , H01L2924/00 , H01L2224/03 , H01L2924/00012 , H01L2224/83 , H01L2224/85 , H01L2224/27 , H01L2924/014 , H01L2924/01082 , H01L2924/0105 , H01L2224/81805 , H01L2924/01005
Abstract: 本发明涉及形成嵌入式SoP扇出型封装的半导体器件和方法。一种半导体器件,包括球栅阵列(BGA)封装,球栅阵列(BGA)封装包括第一凸块。在第一凸块之间将第一半导体管芯安装至BGA封装。将BGA封装和第一半导体管芯安装至载体。将第一密封剂沉积在载体之上以及BGA封装和第一半导体管芯周围。移除载体,以暴露第一凸块和第一半导体管芯。将互连结构电连接至第一凸块和第一半导体管芯。BGA封装还包括衬底和第二半导体管芯,第二半导体管芯被安装且电连接至衬底。将第二密封剂沉积在第二半导体管芯和衬底之上。在衬底之上与第二半导体管芯相对地形成第一凸块。在BGA封装之上形成翘曲平衡层。
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公开(公告)号:CN101937890B
公开(公告)日:2013-11-27
申请号:CN200910211880.6
申请日:2009-11-09
Applicant: 海力士半导体有限公司
IPC: H01L23/48 , H01L23/482 , H01L23/13 , H05K1/18
CPC classification number: H05K1/185 , H01L23/293 , H01L23/5389 , H01L2224/0401 , H01L2224/04105 , H01L2224/06155 , H01L2224/06156 , H01L2224/12105 , H01L2224/2101 , H01L2224/2105 , H01L2224/211 , H01L2224/214 , H01L2224/215 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/18162 , H01L2924/19042 , H01L2924/19043 , H05K2201/0969 , H05K2201/10674 , H05K2203/1469
Abstract: 一种电路板,包括具有上表面和连接至所述上表面的侧表面的半导体芯片。在半导体芯片的上表面上设置焊垫。在焊垫上设置凸块并且凸块从焊垫突出预定高度。电路板主体具有凹陷部,并且半导体芯片位于凹陷部中,使得电路板主体覆盖半导体芯片的上表面和侧表面,同时暴露出凸块的一端。在电路板主体上设置配线,并且配线的一部分位于凸块上方。在配线位于凸块上方的部分的一部分中形成开口以暴露出凸块。增强构件物理连接和电连接暴露的凸块和配线。
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公开(公告)号:CN103219309A
公开(公告)日:2013-07-24
申请号:CN201310006527.0
申请日:2013-01-08
Applicant: 台湾积体电路制造股份有限公司
IPC: H01L23/488 , H01L21/60
CPC classification number: H01L25/0655 , H01L21/31053 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/6836 , H01L21/78 , H01L23/3128 , H01L23/49816 , H01L23/5386 , H01L23/5389 , H01L23/544 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/19 , H01L24/20 , H01L24/24 , H01L24/742 , H01L24/82 , H01L24/92 , H01L24/94 , H01L24/96 , H01L25/50 , H01L2221/68327 , H01L2221/68331 , H01L2223/54426 , H01L2224/02311 , H01L2224/0401 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/11002 , H01L2224/11334 , H01L2224/1134 , H01L2224/1184 , H01L2224/12105 , H01L2224/13022 , H01L2224/13023 , H01L2224/13024 , H01L2224/131 , H01L2224/13144 , H01L2224/13147 , H01L2224/2101 , H01L2224/211 , H01L2224/214 , H01L2224/215 , H01L2224/24011 , H01L2224/24101 , H01L2224/24137 , H01L2224/244 , H01L2224/24991 , H01L2224/82005 , H01L2224/82106 , H01L2224/8213 , H01L2224/82132 , H01L2224/92 , H01L2224/94 , H01L2924/181 , H01L2924/18162 , H01L2924/00014 , H01L2924/014 , H01L2924/00012 , H01L2224/82 , H01L2224/11 , H01L2224/19 , H01L2924/00
Abstract: 本发明涉及多芯片扇出型封装及其形成方法,其中,该封装包括:管芯,位于管芯顶面的导电焊盘;柱状凸块,位于导电焊盘上方并与导电焊盘连接;以及再分布线,位于柱状凸块上方并与柱状凸块连接。电连接件位于再分布线上方并与再分布线电耦合。
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公开(公告)号:CN103107144A
公开(公告)日:2013-05-15
申请号:CN201210442643.2
申请日:2012-11-07
Applicant: 钰桥半导体股份有限公司
CPC classification number: H01L23/3121 , H01L21/56 , H01L23/3677 , H01L23/49827 , H01L23/5389 , H01L24/16 , H01L24/24 , H01L24/25 , H01L24/82 , H01L2224/0401 , H01L2224/04105 , H01L2224/06181 , H01L2224/1132 , H01L2224/1146 , H01L2224/11849 , H01L2224/12105 , H01L2224/131 , H01L2224/13111 , H01L2224/13144 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/16265 , H01L2224/19 , H01L2224/2101 , H01L2224/211 , H01L2224/215 , H01L2224/221 , H01L2224/24101 , H01L2224/24221 , H01L2224/2929 , H01L2224/29339 , H01L2224/73259 , H01L2224/73267 , H01L2224/82106 , H01L2224/83192 , H01L2224/83862 , H01L2224/92244 , H01L2924/0001 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/0104 , H01L2924/01047 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/09701 , H01L2924/12042 , H01L2924/15787 , H01L2924/351 , H01L2924/00014 , H01L2924/014 , H01L2224/13099 , H01L2924/00
Abstract: 本发明有关于一种包含支撑版、无芯增层电路以及内建电子元件的三维半导体组装板。该支撑板包含一凸块、一凸缘层、一加强层及设于该凸块中的一穿孔。该内建电子元件延伸进入该穿孔并电性连接至该增层电路。该增层电路自该凸缘层与该内建电子元件延伸,并提供该内建电子元件的信号路由。该支撑板提供该无芯增层电路的机械支撑力、接地/电源面及散热装置。
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公开(公告)号:CN109791894A
公开(公告)日:2019-05-21
申请号:CN201780057483.0
申请日:2017-09-18
Applicant: 德卡科技公司
Inventor: 克拉格·必绍普 , 克里斯多佛·M·斯坎伦
IPC: H01L21/66
CPC classification number: H01L22/20 , H01L21/31 , H01L24/19 , H01L24/20 , H01L24/32 , H01L2224/02377 , H01L2224/0401 , H01L2224/05166 , H01L2224/05548 , H01L2224/05611 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/13024 , H01L2224/131 , H01L2224/13147 , H01L2224/19 , H01L2224/2101 , H01L2224/211 , H01L2224/221 , H01L2224/94 , H01L2224/03 , H01L2224/11 , H01L2924/00014 , H01L2924/014 , H01L2924/01074
Abstract: 本发明公开一种半导体装置及方法可包括:测量在嵌入式晶粒面板内的多个半导体晶粒的各自的真实位置。确定多个半导体晶粒中的每个的总径向位移。通过根据优先级列表将总径向位移的一部分分步至每个层,将多个半导体晶粒的每个总径向位移分步至每个半导体晶粒的两个或更多层,以形成用于每一层的分布径向位移。可使用每一层的分布径向位移来变换用于多个半导体晶粒的每一层的变换。在多个半导体晶粒的每个上可形成单元特定图案,该单元特定图案含有用于多个层的每个的变换。
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公开(公告)号:CN103608917B
公开(公告)日:2016-11-16
申请号:CN201280028281.0
申请日:2012-04-09
Applicant: 德克萨斯仪器股份有限公司
IPC: H01L23/495 , H01L23/492
CPC classification number: H01L21/4825 , H01L21/563 , H01L23/3107 , H01L23/49537 , H01L23/49548 , H01L23/49562 , H01L23/49575 , H01L24/19 , H01L24/20 , H01L24/27 , H01L24/29 , H01L24/30 , H01L24/32 , H01L24/33 , H01L24/83 , H01L2224/2101 , H01L2224/211 , H01L2224/215 , H01L2224/2732 , H01L2224/291 , H01L2224/29193 , H01L2224/2929 , H01L2224/293 , H01L2224/32104 , H01L2224/32227 , H01L2224/32245 , H01L2224/33181 , H01L2224/83192 , H01L2224/838 , H01L2224/83815 , H01L2224/83851 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/014 , H01L2924/00014 , H01L2924/01006 , H01L2924/01029 , H01L2924/0105 , H01L2924/01028 , H01L2924/00
Abstract: 本发明涉及一种封装的功率晶体管器件(100),其具有引线框,所述引线框包括扁平板片(110)和被所述板片隔开的共面扁平条带(120),所述板片具有第一厚度(110a),并且所述条带具有比所述第一厚度更小的第二厚度(120a),所述板片和条带具有端子(212;121a)。一种场效应功率晶体管芯片(210),其具有第三厚度(210a),在所述芯片一侧的第一和第二接触焊盘,以及在所述芯片相反侧的第三接触焊盘(211),所述第一焊盘被连接到所述板片,所述第二焊盘被连接到所述条带,并且所述第三焊盘与所述端子共面。板片与条带之间厚度差异以及芯片与端子之间的间隔由封装化合物(130)填充,其中所述化合物具有与所述板片表面(111)共面的表面(101),以及与所述第三焊盘(211)和端子(212;212a)共面的相反表面(102),所述表面之间的距离(104)等于所述第一(110a)和第三(210a)厚度的总和。
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公开(公告)号:CN102763494B
公开(公告)日:2015-11-25
申请号:CN201080064300.6
申请日:2010-12-17
Applicant: 施韦策电子公司
CPC classification number: H05K1/186 , H01L21/4846 , H01L21/486 , H01L21/568 , H01L21/6835 , H01L23/3107 , H01L23/5389 , H01L24/11 , H01L24/13 , H01L24/19 , H01L24/20 , H01L2221/68304 , H01L2221/68327 , H01L2221/6835 , H01L2221/68363 , H01L2221/68381 , H01L2224/1134 , H01L2224/12105 , H01L2224/13144 , H01L2224/16225 , H01L2224/2101 , H01L2224/211 , H01L2224/214 , H01L2224/2201 , H01L2224/221 , H01L2224/224 , H01L2224/32225 , H01L2224/73204 , H01L2224/9202 , H01L2924/00011 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01044 , H01L2924/01047 , H01L2924/01061 , H01L2924/01068 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/10253 , H01L2924/12042 , H05K1/189 , H05K3/205 , H05K3/429 , H05K3/4602 , H05K3/462 , H05K2201/0355 , H05K2201/0367 , H05K2201/10977 , H05K2203/063 , H05K2203/1469 , H01L2924/00014 , H01L2924/00 , H01L2224/83851
Abstract: 本发明涉及用于制造导体结构元件的方法,所述方法带有如下步骤:提供刚性载体(12),在刚性载体(12)上电镀沉积铜覆层(14),将导体图形结构(16)施加在铜覆层(14)上然后装配可能的部件,将载体与至少一个电绝缘位层(24、28)层压,清除刚性载体(12),至少这样地部分去除刚性载体(12)的剩余铜覆层(14),使得导体图形结构(16、14、42)显露出来。
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公开(公告)号:CN102194740B
公开(公告)日:2015-03-18
申请号:CN201110061690.8
申请日:2011-03-15
Applicant: 新科金朋有限公司
IPC: H01L21/768 , H01L23/522
CPC classification number: H01L21/76829 , H01L21/4832 , H01L21/486 , H01L21/568 , H01L21/76879 , H01L23/49816 , H01L23/49827 , H01L23/49861 , H01L23/5389 , H01L24/11 , H01L24/19 , H01L24/20 , H01L2224/0401 , H01L2224/04105 , H01L2224/06182 , H01L2224/1132 , H01L2224/11334 , H01L2224/11462 , H01L2224/11464 , H01L2224/11849 , H01L2224/11901 , H01L2224/12105 , H01L2224/131 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/20 , H01L2224/2101 , H01L2224/211 , H01L2224/215 , H01L2224/221 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01047 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/09701 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H05K1/185 , H05K2201/10674 , H01L2924/00014 , H01L2224/81 , H01L2224/83 , H01L2924/00
Abstract: 一种半导体器件具有安装在载体上的半导体管芯。密封剂被沉积在载体和半导体管芯上。除去载体。第一互连结构形成在密封剂和所述管芯的第一表面上。第二互连结构形成在密封剂和所述管芯的第二表面上。在形成所述通路之前,第一保护层形成在第一互连结构上,且第二保护层形成在第二互连结构上。通过第二互连结构、密封剂和第一互连结构形成多个通路。第一导电层形成在所述通路中以电连接第一互连结构和第二互连结构。绝缘层形成在第一互连结构和第二互连结构上并进入所述通路中。分立半导体部件可以安装到第一互连结构。
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