Invention Grant
- Patent Title: Multi-channel decoder architecture
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Application No.: US14879262Application Date: 2015-10-09
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Publication No.: US09992124B2Publication Date: 2018-06-05
- Inventor: Danny Ray Seely , Michael David McNamee
- Applicant: ITRON, INC.
- Applicant Address: US WA Liberty Lake
- Assignee: ITRON, INC.
- Current Assignee: ITRON, INC.
- Current Assignee Address: US WA Liberty Lake
- Main IPC: H04B7/02
- IPC: H04B7/02 ; H04L12/851 ; H04B1/06 ; H04W52/02

Abstract:
An example method of receiving a data packet includes receiving a data packet at a channel receiver of at least one channel receiver each associated with a channel, providing the data packet to a data packet identification block that corresponds to the channel receiver, validating the data packet at the data packet identification block, and providing the validated data packet to an available decoder block of at least one decoder block capable of performing one or more decoding functions, where a quantity of the decoder blocks is less than a quantity of the data packet identification blocks and optimized according to one or more goals. If no decoder block is available and the validated data packet is a higher priority data packet, a decoder block processing a lower priority data packet may be forced to stop processing the lower priority data packet and process the higher priority data packet.
Public/Granted literature
- US20170104684A1 MULTI-CHANNEL DECODER ARCHITECTURE Public/Granted day:2017-04-13
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