Invention Grant
- Patent Title: Semiconductor device and fabrication method thereof
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Application No.: US15045670Application Date: 2016-02-17
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Publication No.: US09991394B2Publication Date: 2018-06-05
- Inventor: Shunpei Yamazaki
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2015-032320 20150220
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L29/786 ; H01L29/417 ; H01L29/04 ; H01L27/12

Abstract:
A transistor with high and stable electrical characteristics whose parasitic capacitance is suppressed is provided even when miniaturized. A semiconductor device including it also achieves higher performance and reliability. The transistor includes an oxide semiconductor over a substrate, first and second electrodes in contact with the oxide semiconductor, an insulator over the oxide semiconductor, and the first and second electrodes, and a third electrode over the insulator. The oxide semiconductor includes a first region, a second region, and a third region overlapping with the first electrode, the second electrode, and the third electrode, respectively. The first region and the second region include a fourth region and a fifth region each overlapping with the third region, respectively. Top surfaces of the first and second electrodes are provided on the same plane as a top surface of the oxide semiconductor or the side closer to the oxide semiconductor than the same plane.
Public/Granted literature
- US20160247928A1 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF Public/Granted day:2016-08-25
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