A process of forming a semiconductor device that includes an interconnection formed by electro-plating is disclosed. The process comprises steps of: forming a stopper layer on a first insulating film; covering the stopper layer and the first insulating film with a second insulating film; preparing a first mask having an edge that overlaps with the stopper layer; depositing a seed layer on the first mask and the second insulating film that is exposed from the first mask; preparing a second mask having an edge that overlaps with the stopper layer, the edge of the first mask being retreated from the edge of the second mask; forming an upper layer on the seed layer by electro-plating a metal so as not to overlap with the first mask; and removing the seed layer exposed from the upper layer by etching.