- Patent Title: Transistor and display device comprising oxide semiconductor layer
-
Application No.: US13528009Application Date: 2012-06-20
-
Publication No.: US09935202B2Publication Date: 2018-04-03
- Inventor: Shunpei Yamazaki , Masayuki Sakakura , Ryosuke Watanabe , Junichiro Sakata , Kengo Akimoto , Akiharu Miyanaga , Takuya Hirohashi , Hideyuki Kishida
- Applicant: Shunpei Yamazaki , Masayuki Sakakura , Ryosuke Watanabe , Junichiro Sakata , Kengo Akimoto , Akiharu Miyanaga , Takuya Hirohashi , Hideyuki Kishida
- Applicant Address: JP Kanagawa-ken
- Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- Current Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- Current Assignee Address: JP Kanagawa-ken
- Agency: Robinson Intellectual Property Law Office
- Agent Eric J. Robinson
- Priority: JP2009-215084 20090916
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L29/786 ; H01L27/12 ; H01L29/04

Abstract:
To provide a transistor having a favorable electric characteristics and high reliability and a display device including the transistor. The transistor is a bottom-gate transistor formed using an oxide semiconductor for a channel region. An oxide semiconductor layer subjected to dehydration or dehydrogenation through heat treatment is used as an active layer. The active layer includes a first region of a superficial portion microcrystallized and a second region of the rest portion. By using the oxide semiconductor layer having such a structure, a change to an n-type, which is attributed to entry of moisture to the superficial portion or elimination of oxygen from the superficial portion, and generation of a parasitic channel can be suppressed. In addition, contact resistance between the oxide semiconductor layer and source and drain electrodes can be reduced.
Public/Granted literature
- US20120256179A1 TRANSISTOR AND DISPLAY DEVICE Public/Granted day:2012-10-11
Information query
IPC分类: