Invention Grant
- Patent Title: Three dimensional vertical channel semiconductor memory device
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Application No.: US15063887Application Date: 2016-03-08
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Publication No.: US09935121B2Publication Date: 2018-04-03
- Inventor: Satoshi Konagai , Yoshihiro Akutsu , Masaru Kito
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: H01L29/792
- IPC: H01L29/792 ; H01L27/11582 ; H01L21/768 ; H01L27/11565

Abstract:
According to one embodiment, a semiconductor memory device includes a stacked body, a semiconductor pillar, a memory film and a conductive member. The stacked body includes a plurality of electrode layers arranged in a first direction. The semiconductor pillar extends in the stacked body in the first direction. The memory film provides between the stacked body and the semiconductor pillar. The conductive member includes a contact and an interconnect. The contact includes metal, the contact extending in the stacked body in the first direction. The interconnect extends in a second direction crossing the first direction, and the interconnect including metal.
Public/Granted literature
- US20170077131A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2017-03-16
Information query
IPC分类: