Invention Grant
- Patent Title: Semiconductor structure and manufacturing method of the same
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Application No.: US15480883Application Date: 2017-04-06
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Publication No.: US09935073B2Publication Date: 2018-04-03
- Inventor: Yen-Liang Lin , Mirng-Ji Lii , Tin-Hao Kuo , Chen-Shien Chen , Yu-Feng Chen , Sheng-Yu Wu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee Address: TW Hsinchu
- Agency: WPAT, P.C., Intellectual Property Attorneys
- Agent Anthony King
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/498

Abstract:
The present disclosure provides a semiconductor package, including a semiconductor die and a substrate having a first surface electrically coupled to the semiconductor die and a second surface opposing to the first surface. The first surface includes a core region having a plurality of landing pads and a periphery region surrounding the core region and having a plurality of landing traces. A pitch of the landing pads is from about 55 μm to about 280 μm. The semiconductor die includes a third surface facing the first surface of the substrate and a fourth surface opposing to the third surface. The third surface includes a plurality of elongated bump positioned correspondingly to the landing pads and the landing traces of the substrate, and the elongated bump includes a long axis and a short axis perpendicular to the long axis on a cross section thereof.
Public/Granted literature
- US20170213804A1 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD OF THE SAME Public/Granted day:2017-07-27
Information query
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