Invention Grant
- Patent Title: Dynamically adjusting read voltage in a NAND flash memory
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Application No.: US15424716Application Date: 2017-02-03
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Publication No.: US09934865B2Publication Date: 2018-04-03
- Inventor: Thomas J. Griffin , Steven J. Hnatko
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Martin & Associates, LLC
- Agent Derek P. Martin
- Main IPC: G11C16/28
- IPC: G11C16/28 ; G11C11/56 ; G11C16/10 ; G11C16/34 ; G06F11/10 ; G11C29/52

Abstract:
A NAND flash memory device detects the occurrence of Cell Voltage Distribution Disruption Events (CVDDEs), such as a Partial Block Program (PBP) and Program-Read-Immediate (PM), and provides a way to dynamically adjust read voltage to account for CVDDEs. A read command includes extended addressing bits that are used when a CVDDE has occurred to access registers that indicate an adjustment to read voltage that is needed to accommodate the CVDDE. The read voltage is then dynamically adjusted to accommodate the CVDDE. When the CVDDE is no longer an issue, the read voltage is adjusted to its previous value before the CVDDE.
Public/Granted literature
- US20170169894A1 DYNAMICALLY ADJUSTING READ VOLTAGE IN A NAND FLASH MEMORY Public/Granted day:2017-06-15
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