Systems and methods are provided for a sense amplifier/write driver circuit. A system includes a set of transistors responsive to a memory cell, the set of transistors configured to operate as a sense amplifier in a first mode and to operate as a write driver in a second mode. One or more switches are configured to switch the set of transistors from the first mode to the second mode based on a control signal. Particular transistors of the set of transistors are configured by the one or more switches to amplify and retain data at a pair of input/output nodes for a period of time in the first mode. The particular transistors are further configured by the one or more switches to drive data to the pair of input/output nodes in the second mode.