Invention Grant
- Patent Title: Interconnection structure and manufacturing method thereof
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Application No.: US15379461Application Date: 2016-12-14
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Publication No.: US09911691B2Publication Date: 2018-03-06
- Inventor: Zhi-Sheng Zheng , Chih-Lin Wang
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Maschoff Brennan
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/522 ; H01L21/768 ; H01L23/532 ; H01L23/528

Abstract:
An interconnection structure includes a first dielectric layer, at least one first conductor, and an etch stop layer. The first conductor is disposed partially in the first dielectric layer and has a portion protruding from the first dielectric layer. The etch stop layer is disposed on the first dielectric layer and covers the protruding portion of the first conductor. The etch stop layer has a cap portion on a top surface of the protruding portion of the first conductor and a spacer portion on at least one sidewall of the protruding portion of the first conductor, and the spacer portion is thicker than the cap portion.
Public/Granted literature
- US20170098605A1 INTERCONNECTION STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2017-04-06
Information query
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