Memory cell having resistive and capacitive storage elements
Abstract:
A technique including using an array of memory cells for data storage. A given cell of the memory cells includes a capacitive storage element and a resistive storage element that is coupled in series with the capacitive storage element. The technique includes accessing the given memory cell to write a value to the given memory cell or read a value stored in the memory cell. The accessing includes applying a time varying voltage to the memory cell.
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