Invention Grant
- Patent Title: Vector processor configured to operate on variable length vectors using instructions to combine and split vectors
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Application No.: US14727076Application Date: 2015-06-01
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Publication No.: US09910824B2Publication Date: 2018-03-06
- Inventor: Mayan Moudgill , Gary J. Nacer , C. John Glossner , Arthur Joseph Hoane , Paul Hurtley , Murugappan Senthilvelan , Pablo Balzola
- Applicant: Optimum Semiconductor Technologies, Inc.
- Applicant Address: US NY Tarrytown
- Assignee: Optimum Semiconductor Technologies, Inc.
- Current Assignee: Optimum Semiconductor Technologies, Inc.
- Current Assignee Address: US NY Tarrytown
- Agency: Lowenstein Sandler LLP
- Agent Jialin Zhong, Esq.
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F9/38 ; G06F15/80 ; G06F15/78 ; G06F17/14
Abstract:
A computer processor is disclosed. The computer processor may comprise a vector unit comprising a vector register file comprising at least one register to hold a varying number of elements. The computer processor may further comprise processing logic configured to operate on the varying number of elements in the vector register file using one or more instructions that separate a vector or combine two vectors. The computer processor may be implemented as a monolithic integrated circuit.
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