Invention Grant
- Patent Title: Serdes interface architecture for multi-processor systems
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Application No.: US14043920Application Date: 2013-10-02
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Publication No.: US09910818B2Publication Date: 2018-03-06
- Inventor: Stephen O'Connor , Shyam Chandra , Robert Bartel
- Applicant: Lattice Semiconductor Corporation
- Applicant Address: US OR Hillsboro
- Assignee: Lattice Semiconductor Corporation
- Current Assignee: Lattice Semiconductor Corporation
- Current Assignee Address: US OR Hillsboro
- Agency: Haynes and Boone, LLP
- Main IPC: G06F13/42
- IPC: G06F13/42

Abstract:
A local device, such as a field-programmable gate array, has a local state machine and a local interface component for communicating with a remote device that implements a remote state machine. The local interface component receives a new set of incoming data from the remote device and determines whether the new set is good data or bad data. If good data, then the local interface component causes the new set of data to transmitted internally for use by the local state machine. If bad data, then the local interface component does not forward the new set of data to the local state machine, which instead continues to use a previously received set of good data. Although the clock rate of the local and remote state machines may differ from the frame rate of the local interface component, their operations are nevertheless synchronized.
Public/Granted literature
- US20150095534A1 Serdes Interface Architecture for Multi-Processor Systems Public/Granted day:2015-04-02
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