Invention Grant
- Patent Title: High bandwidth low latency data exchange between processing elements
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Application No.: US14948656Application Date: 2015-11-23
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Publication No.: US09910802B2Publication Date: 2018-03-06
- Inventor: Bruce M. Fleischer , Thomas W. Fox , Hans M. Jacobson , Ravi Nair
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Main IPC: G06F13/00
- IPC: G06F13/00 ; G06F13/362 ; G06F13/40 ; G06F13/28 ; G06F13/42 ; G06F15/173

Abstract:
Direct communication of data between processing elements is provided. An aspect includes sending, by a first processing element, data over an inter-processing element chaining bus. The data is destined for another processing element via a data exchange component that is coupled between the first processing element and a second processing element via a communication line disposed between corresponding multiplexors of the first processing element and the second processing element. A further aspect includes determining, by the data exchange component, whether the data has been received at the data exchange element. If so, an indicator is set in a register of the data exchange component and the data is forwarded to the other processing element. Setting the indicator causes the first processing element to stall. If the data has not been received, the other processing element is stalled while the data exchange component awaits receipt of the data.
Public/Granted literature
- US20160364364A1 LOW LATENCY DATA EXCHANGE BETWEEN PROCESSING ELEMENTS Public/Granted day:2016-12-15
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