A thin film transistor array substrate includes a thin film transistor including a first gate electrode, an active layer, a source electrode, and a drain electrode. A first conductive layer pattern is on a same layer as the source electrode and the drain electrode and formed of a same material as the source electrode and the drain electrode. An insulating layer is on the first conductive layer pattern and has an opening exposing a patterning cross-section of the first conductive layer pattern. A pixel electrode is on the insulating layer and is coupled to the source electrode or the drain electrode through a contact hole passing through the insulating layer. A diffusion prevention layer covers the patterning cross-section of the first conductive layer pattern and inclined side surfaces of the insulating layer exposed through the opening.