Invention Grant
- Patent Title: Semiconductor device manufacturing method
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Application No.: US15060415Application Date: 2016-03-03
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Publication No.: US09754915B2Publication Date: 2017-09-05
- Inventor: Kazuhiko Okishima
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JP2015-069375 20150330
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/495

Abstract:
In wire bonding in assembling of a semiconductor device, an Al wire is coupled to a lead section by a wedge which is a bonding tool, thereafter, the wedge is withdrawn from the top of the lead section and a cutter is lowered and the Al wire is cut off in this state. Lowering of the cutter is stopped at a point in time that a stopper which is lowered simultaneously with lowering of the cutter has truck against the lead section and cutting of the Al wire is terminated by stopping of lowering of the cutter.
Public/Granted literature
- US20160293569A1 SEMICONDUCTOR DEVICE MANUFACTURING METHOD Public/Granted day:2016-10-06
Information query
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