Invention Grant
- Patent Title: Horizontal gate-all-around device having wrapped-around source and drain
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Application No.: US14942696Application Date: 2015-11-16
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Publication No.: US09754840B2Publication Date: 2017-09-05
- Inventor: Chun-Hsiung Lin , Chung-Cheng Wu , Carlos H. Diaz , Chih-Hao Wang , Wen-Hsing Hsieh , Yi-Ming Sheu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L21/8238 ; H01L27/092 ; H01L27/12 ; H01L29/417 ; H01L29/66 ; H01L27/088 ; H01L29/78

Abstract:
A method of forming a semiconductor device includes forming a fin extending from a substrate. The fin has a source/drain (S/D) region and a channel region. The fin includes a first semiconductor layer and a second semiconductor layer on the first semiconductor layer. The first semiconductor layer has a first composition, and the second semiconductor layer has a second composition different from the first composition. The method further includes removing the first semiconductor layer from the S/D region of the fin such that a first portion of the second semiconductor layer in the S/D region is suspended in a space. The method further includes epitaxially growing a third semiconductor layer in the S/D region, the third semiconductor layer wrapping around the first portion of the second semiconductor layer.
Public/Granted literature
- US20170140996A1 Horizontal Gate-All-Around Device Having Wrapped-Around Source and Drain Public/Granted day:2017-05-18
Information query
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