Invention Grant
- Patent Title: Managing memory regions to support sparse mappings
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Application No.: US14046064Application Date: 2013-10-04
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Publication No.: US09754561B2Publication Date: 2017-09-05
- Inventor: Jonathan Dunaisky , Henry Packard Moreton , Jeffrey A. Bolz , Yury Y. Uralsky , James Leroy Deming , Rui M. Bastos , Patrick R. Brown , Amanpreet Grewal , Christian Amsinck , Poornachandra Rao , Jerome F. Duluk, Jr. , Andrew J. Tao
- Applicant: NVIDIA CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA CORPORATION
- Current Assignee: NVIDIA CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Artegis Law Group, LLP
- Main IPC: G06T1/60
- IPC: G06T1/60 ; G06F12/08 ; G06F12/10 ; G09G5/39 ; G06F12/0897 ; G06F12/1027

Abstract:
One embodiment of the present invention includes a memory management unit (MMU) that is configured to manage sparse mappings. The MMU processes requests to translate virtual addresses to physical addresses based on page table entries (PTEs) that indicate a sparse status. If the MMU determines that the PTE does not include a mapping from a virtual address to a physical address, then the MMU responds to the request based on the sparse status. If the sparse status is active, then the MMU determines the physical address based on whether the type of the request is a write operation and, subsequently, generates an acknowledgement of the request. By contrast, if the sparse status is not active, then the MMU generates a page fault. Advantageously, the disclosed embodiments enable the computer system to manage sparse mappings without incurring the performance degradation associated with both page faults and conventional software-based sparse mapping management.
Public/Granted literature
- US20150097847A1 MANAGING MEMORY REGIONS TO SUPPORT SPARSE MAPPINGS Public/Granted day:2015-04-09
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