Invention Grant
- Patent Title: Method of forming semiconductor device with different threshold voltages
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Application No.: US14839753Application Date: 2015-08-28
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Publication No.: US09728461B2Publication Date: 2017-08-08
- Inventor: Cheng-Yi Peng , Chia-Cheng Ho , Chih Chieh Yeh , Tsung-Lin Lee , Yu-Lin Yang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L21/8238 ; H01L21/324

Abstract:
A method for fabricating a semiconductor device includes forming a first gate stack over a first fin feature and second gate stack over a second fin feature, removing the first gate stack to form a first gate trench that exposes the first fin structure, removing the second gate stack to form a second gate trench that exposes the second fin feature, performing a high-pressure-anneal process to a portion of the first fin feature and forming a first high-k/metal gate (HK/MG) within the first gate trench over the portion of the first fin feature and a second HK/MG within the second gate trench over the second fin feature. Therefore the first HK/MG is formed with a first threshold voltage and the second HK/MG is formed with a second threshold voltage, which is different than the first threshold voltage.
Public/Granted literature
- US20160172248A1 Method of Forming Semiconductor Device with Different Threshold Voltages Public/Granted day:2016-06-16
Information query
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