Invention Grant
- Patent Title: Technologies for ethernet link robustness for deep sleep low power applications
-
Application No.: US14574482Application Date: 2014-12-18
-
Publication No.: US09722717B2Publication Date: 2017-08-01
- Inventor: Yoni Landau , Assaf Benhamou , Adee O. Ran
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Barnes & Thornburg LLP
- Main IPC: H04L12/12
- IPC: H04L12/12 ; H04J3/06 ; H04L7/04

Abstract:
Technologies for robust data transmission include a network port logic having a physical coding sublayer (PCS). The PCS may transmit a series of rapid alignment markers (RAMs) to a link partner, with each RAM indicative of a counter value. The PCS transitions to a sleep state if the counter value equals two and a low power idle (LPI) command is set by an upper-layer client. The PCS transitions to an active state if the counter value equals one and the LPI command is not set. The PCS may receive a low power idle symbol (LI) from the link partner and start a guard timer in response to receipt of the LI symbol. The PCS transitions to a sleep state if the guard timer expires and transitions to the active state if data other than LI is received prior to expiration of the guard timer. Other embodiments are described and claimed.
Public/Granted literature
- US20160182175A1 TECHNOLOGIES FOR ETHERNET LINK ROBUSTNESS FOR DEEP SLEEP LOW POWER APPLICATIONS Public/Granted day:2016-06-23
Information query