Invention Grant
- Patent Title: Manufacturing method of semiconductor device with silicon layer containing carbon
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Application No.: US14990242Application Date: 2016-01-07
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Publication No.: US09722044B2Publication Date: 2017-08-01
- Inventor: Takaaki Tsunomura , Toshiaki Iwamatsu
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Foley & Lardner LLP
- Priority: JP2013-7425 20130118
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/36 ; H01L21/365 ; H01L21/324 ; H01L29/06 ; H01L29/786 ; H01L21/84 ; H01L27/12 ; H01L21/265

Abstract:
A semiconductor device having an n channel MISFET formed on an SOI substrate including a support substrate, an insulating layer formed on the support substrate and a silicon layer formed on the insulating layer has the following structure. An impurity region for threshold adjustment is provided in the support substrate of a gate electrode so that the silicon layer contains carbon. The threshold value can be adjusted by the semiconductor region for threshold adjustment in this manner. Further, by providing the silicon layer containing carbon, even when the impurity of the semiconductor region for threshold adjustment is diffused to the silicon layer across the insulating layer, the impurity is inactivated by the carbon implanted into the silicon layer. As a result, the fluctuation of the transistor characteristics, for example, the fluctuation of the threshold voltage of the MISFET can be reduced.
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