Semiconductor device, electronic component, and electronic appliance
Abstract:
A semiconductor device with a novel structure that can consume less power and have a reduced size of a circuit. In the semiconductor device, when configuration operation is started in a path transistor in a configuration memory, supply of an H-level potential to a signal pass node is stopped and then the potential of the signal pass node is set at L level, whereby configuration data is input to a memory potential retaining node, which is a gate of the path transistor. After the configuration operation is completed, the supply of the H-level potential to the signal pass node is resumed so that capacitive coupling occurs between the path transistor and the memory potential retaining node and increase the gate potential of the path transistor, so that a boosting effect is obtained. The above structure eliminates the need for a keeper circuit, reducing the power consumption and the circuit area.
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