Control loop coefficients for a digital voltage regulator controller are determined by determining PID (proportional-integral-derivative) coefficients that satisfy gain and phase margin targets for a digital voltage regulator controller, as a function of a plurality of system parameters for the digital voltage regulator controller, and re-determining one or more of the PID coefficients to flatten an output impedance response of the digital voltage regulator controller for frequencies below a bandwidth of the digital voltage regulator controller.