Invention Grant
- Patent Title: Semiconductor device and manufacturing method thereof
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Application No.: US15144274Application Date: 2016-05-02
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Publication No.: US09698271B2Publication Date: 2017-07-04
- Inventor: Kazuya Hanaoka
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP
- Agency: Husch Blackwell LLP
- Priority: JP2013-099534 20130509
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L29/417 ; H01L21/768 ; H01L29/26 ; H01L21/336 ; H01L29/66 ; H01L27/12 ; H01L29/45 ; H01L29/04 ; H01L29/24
Abstract:
To provide a semiconductor device having a structure with which the device can be easily manufactured even if the size is decreased and which can suppress a decrease in electrical characteristics caused by the decrease in the size, and a manufacturing method thereof. A source electrode layer and a drain electrode layer are formed on an upper surface of an oxide semiconductor layer. A side surface of the oxide semiconductor layer and a side surface of the source electrode layer are provided on the same surface and are electrically connected to a first wiring. Further, a side surface of the oxide semiconductor layer and a side surface of the drain electrode layer are provided on the same surface and are electrically connected to a second wiring.
Public/Granted literature
- US09905695B2 Multi-layered oxide semiconductor transistor Public/Granted day:2018-02-27
Information query
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