Invention Grant
- Patent Title: Epitaxy in semiconductor structure and manufacturing method of the same
-
Application No.: US14158673Application Date: 2014-01-17
-
Publication No.: US09698249B2Publication Date: 2017-07-04
- Inventor: Yi-Ming Huang , Hsiu-Ting Chen , Shih-Chieh Chang
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee Address: TW Hsinchu
- Agency: WPAT, P.C., Intellectual Property Attorneys
- Agent Anthony King
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78

Abstract:
The present disclosure provides a semiconductor structure having an insulating layer positioning on a substrate; a semiconductor fin partially located in the insulating layer; and a metal gate over the semiconductor fin and the insulating layer. The semiconductor fin includes a first region including a first lattice constant and a second region in proximity to the metal gate, including a second lattice constant. At least one dislocation is located only in the second region of the semiconductor fin. The present disclosure provides a method for manufacturing a semiconductor structure, including forming a gate over a first semiconductor layer, removing a portion of the first semiconductor layer in proximity to a sidewall of the gate and obtaining a recess, and forming a second semiconductor layer in the recess. At least one dislocation is in-situ formed in the second semiconductor layer without extending to the first semiconductor layer.
Public/Granted literature
- US20150206939A1 EPITAXY IN SEMICONDUCTOR STRUCTURE AND MENUFACUTING METHOD OF THE SAME Public/Granted day:2015-07-23
Information query
IPC分类: