Invention Grant
- Patent Title: Memory device containing stress-tunable control gate electrodes
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Application No.: US14553149Application Date: 2014-11-25
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Publication No.: US09698223B2Publication Date: 2017-07-04
- Inventor: Rahul Sharangpani , Raghuveer S. Makala , George Matamis
- Applicant: SANDISK TECHNOLOGIES INC.
- Applicant Address: US TX Plano
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX Plano
- Agency: The Marbury Law Group PLLC
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L27/115 ; H01L27/02 ; H01L27/11524 ; H01L27/11551 ; H01L27/1157 ; H01L27/11578 ; H01L27/11556 ; H01L27/11582

Abstract:
A memory film and a semiconductor channel are formed within each memory opening that extends through a stack including an alternating plurality of insulator layers and sacrificial material layers. After formation of backside recesses through removal of the sacrificial material layers selective to the insulator layers, electrically conductive layers are formed in the backside recesses. Each electrically conductive layer includes a combination of a tensile-stress-generating metallic material and a compressive-stress-generating metallic material. The tensile-stress-generating metallic material may be ruthenium and the compressive-stress-generating metallic material may be tungsten. An anneal may be performed to provide an alloy of the compressive-stress-generating metallic material and the tensile-stress-generating metallic material.
Public/Granted literature
- US20160149002A1 MEMORY DEVICE CONTAINING STRESS-TUNABLE CONTROL GATE ELECTRODES Public/Granted day:2016-05-26
Information query
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