Invention Grant
- Patent Title: Shallow trench isolation for semiconductor devices
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Application No.: US15161182Application Date: 2016-05-20
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Publication No.: US09698043B1Publication Date: 2017-07-04
- Inventor: Kevin K. Chan , Stephan A. Cohen , Alfred Grill , Deborah A. Neumayer
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agent Louis J. Percello; Robert M. Trepp
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L21/02 ; H01L21/3065 ; H01L21/311
Abstract:
A substrate incorporating semiconductor regions electrically isolated by shallow trenches filled with hexagonal, textured or columnar boron nitride. A process for filling shallow trenches in a semiconductor substrate with columnar textured boron nitride using pulsed plasma enhanced chemical vapor deposition (Pulsed PECVD) and plasma assisted atomic layer deposition (PAALD).
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