Invention Grant
- Patent Title: Three-dimensional processing system having at least one layer with circuitry dedicated to scan testing and system state checkpointing of other system layers
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Application No.: US15084553Application Date: 2016-03-30
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Publication No.: US09696379B2Publication Date: 2017-07-04
- Inventor: Alper Buyuktosunoglu , Philip G. Emma , Allan M. Hartstein , Michael B. Healy , Krishnan K. Kailas
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Ryan, Mason & Lewis, LLP
- Agent Jennifer R. Davis
- Main IPC: G01R31/00
- IPC: G01R31/00 ; G01R31/3185 ; G01R31/26 ; G11C29/32 ; G01R31/3177

Abstract:
A method is provided for maintaining system state in semiconductor device having a first chip and a second chip, which are physically conjoined to form a stacked structure, wherein the first chip includes functional circuitry, and the second chip includes control circuitry for capturing and restoring a microarchitecture state of the functional circuitry of the first chip. The method includes initializing a system state of the semiconductor device and entering a wait state for a state capture triggering event. In response to an occurrence of a state capture triggering event, state data representing a current system state of the functional circuitry on the first chip is captured. The captured state data is transferred to the second chip through a system state I/O (input/output) interface of the second chip under control of the control circuitry on the second chip. A copy of the captured state data is then stored in a memory.
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