Invention Grant
- Patent Title: Method of fabricating semiconductor structure
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Application No.: US14928633Application Date: 2015-10-30
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Publication No.: US09679850B2Publication Date: 2017-06-13
- Inventor: Wei Ting Chen , Che-Cheng Chang , Chen-Hsiang Lu , Yu-Cheng Liu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee Address: TW Hsinchu
- Agency: WPAT, P.C., Intellectual Property Attorneys
- Agent Anthony King
- Main IPC: H01L21/4763
- IPC: H01L21/4763 ; H01L23/532 ; H01L23/528 ; H01L23/522 ; H01L21/768 ; H01L21/033 ; H01L21/311

Abstract:
A semiconductor structure having tapered damascene aperture is disclosed. The semiconductor structure including an etching stop layer over an inter-layer dielectric (ILD) layer, a low-k dielectric layer over the etching stop layer, and a tapered aperture at least going into the low-k dielectric layer; wherein the tapered aperture is filled with copper (Cu), a width of a mouth surface portion of the aperture tapers inwardly from a first, wider width to a second, narrower width at a bottom surface portion of the aperture, and the width of the bottom surface portion of the tapered aperture is less than 50 nm. Associated methods of fabricating a semiconductor structure are also disclosed.
Public/Granted literature
- US20170125353A1 METHOD OF FABRICATING SEMICONDUCTOR STRUCTURE Public/Granted day:2017-05-04
Information query
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