According to one embodiment, a receiving device includes a first PLL circuit, a second PLL circuit, and a control circuit. The first PLL circuit includes a first VCO and extracts a first clock from a received first packet. The second PLL circuit includes a second VCO and outputs a second clock acquired by multiplying the received clock by N. The control circuit applies a control signal of the second VCO to a first line controlling the first VCO during a first time from start of reception of the first packet.