Invention Grant
- Patent Title: Method of preventing drain and read disturbances in non-volatile memory device
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Application No.: US14820547Application Date: 2015-08-06
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Publication No.: US09673278B2Publication Date: 2017-06-06
- Inventor: Chengcheng Wang
- Applicant: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
- Applicant Address: CN Shanghai
- Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
- Current Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
- Current Assignee Address: CN Shanghai
- Agency: Kilpatrick Townsend & Stockton LLP
- Priority: CN201410387740 20140807
- Main IPC: H01L29/08
- IPC: H01L29/08 ; H01L29/78 ; H01L29/66 ; H01L21/265 ; H01L27/11521 ; H01L21/266 ; H01L21/8234

Abstract:
A source-drain structure and method of manufacturing the same are disclosed. The source-drain structure includes a substrate containing a drain region and a source region. The drain region includes a lightly-doped ultra-shallow junction and a heavily-doped region, and a drain-substrate junction disposed in the vicinity of a junction between a side portion and a bottom portion of the lightly-doped ultra-shallow junction and the substrate, a plurality of impurity ions in the drain-substrate junction and a plurality of impurity ions in the lightly-doped ultra-shallow junction are opposite-conductivity type ions. The drain-substrate junction can smooth out the steep surface of the lightly-doped ultra-shallow junction to minimize the maximum electric field and reduce the ion flow close to the channel, and effectively reduce the inter-band tunneling hot electron effect.
Public/Granted literature
- US20160043176A1 METHOD OF PREVENTING DRAIN AND READ DISTURBANCES IN NON-VOLATILE MEMORY DEVICE Public/Granted day:2016-02-11
Information query
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