Invention Grant
- Patent Title: Multi-gate device and method of fabrication thereof
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Application No.: US14994399Application Date: 2016-01-13
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Publication No.: US09660033B1Publication Date: 2017-05-23
- Inventor: I-Sheng Chen , Chih Chieh Yeh , Cheng-Hsien Wu , Yee-Chia Yeo
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufactuing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufactuing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/265 ; H01L27/092 ; H01L29/10 ; H01L29/06 ; H01L29/165 ; H01L29/423 ; H01L29/66 ; H01L29/786 ; H01L27/088
Abstract:
A method of semiconductor device fabrication includes providing a fin extending from a substrate and having a source/drain region and a channel region. The fin includes a first layer, a second layer over the first layer, and a third layer over the second layer. A gap is formed by removing at least a portion of the second layer from the channel region. A first material is formed in the channel region to form first and second interfacial layer portions, each at least partially wrapping around the first and third layers respectively. A second material is deposited in the channel region to form first and second high-k dielectric layer portions, each at least partially wrapping around the first and second interfacial layer portions. A metal layer including a scavenging material is formed along opposing sidewalls of the first and second high-k dielectric layer portions in the channel region.
Information query
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