Invention Grant
- Patent Title: Manufacturing methods semiconductor packages including through mold connectors
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Application No.: US15167383Application Date: 2016-05-27
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Publication No.: US09659910B1Publication Date: 2017-05-23
- Inventor: Jong Hoon Kim , Ki Jun Sung , Young Geun Yoo , Hyeong Seok Choi
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si
- Agency: William Park & Associates Ltd.
- Priority: KR10-2016-0001474 20160106
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L25/065 ; H01L25/00 ; H01L21/48 ; H01L21/56 ; H01L23/00 ; H01L21/3105 ; H01L23/498 ; H01L23/31
Abstract:
A semiconductor package structure and a method for manufacturing the same are provided. According to the method, a first mold layer is formed to cover a first semiconductor chip and a first bumps. A portion of the first mold layer is removed to expose top portions of the first bumps and second bumps are disposed to be connected to each of the first bumps. A second mold layer is formed, and the second mold layer is recessed to form through mold connectors that substantially penetrate the second mold layer with the second bumps disposed on the first bumps.
Information query
IPC分类:
