Invention Grant
- Patent Title: Method for identifying logical loops in ethernet networks
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Application No.: US14444165Application Date: 2014-07-28
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Publication No.: US09647893B2Publication Date: 2017-05-09
- Inventor: David Michael Colven
- Applicant: David Michael Colven
- Applicant Address: JP Kawasaki
- Assignee: Fujitsul Limited
- Current Assignee: Fujitsul Limited
- Current Assignee Address: JP Kawasaki
- Agency: Baker Botts L.L.P.
- Main IPC: H04L12/24
- IPC: H04L12/24 ; H04L12/437 ; H04L12/42 ; H04L12/433 ; H04L12/46

Abstract:
A method and system for identifying logical loops in an Ethernet network may determine a number of nodes N and a number of links L between nodes. A number of rings R, including a number of major rings and a number of sub-rings for the Ethernet network may be determined. Specific formulas for the values for L, R, and N may be evaluated to determine when the Ethernet network includes logical loops.
Public/Granted literature
- US20160028588A1 METHOD FOR IDENTIFYING LOGICAL LOOPS IN ETHERNET NETWORKS Public/Granted day:2016-01-28
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