A device for codeword filling comprises at least one processor circuit. The at least one processor circuit is configured to receive portions of a data burst, encode the portions into blocks, and add the blocks to a buffer. The at least one processor circuit is configured to generate a first codeword from blocks of the buffer when a number of blocks in the buffer satisfies a threshold, remove the blocks from the buffer, and provide the first codeword for transmission. The at least one processor circuit is configured to generate a set of codewords from remaining blocks of the buffer when a marker indicating a data burst end is detected, the set of codewords being determined based at least on a number of the remaining blocks in the buffer when the marker is detected. The at least one processor circuit is configured to provide the set of codewords for transmission.