Invention Grant
- Patent Title: Delay circuit and semiconductor device
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Application No.: US15165393Application Date: 2016-05-26
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Publication No.: US09647651B2Publication Date: 2017-05-09
- Inventor: Takahisa Takeda , Tomomi Taniguchi
- Applicant: SII Semiconductor Corporation
- Applicant Address: JP Chiba
- Assignee: SII SEMICONDUCTOR CORPORATION
- Current Assignee: SII SEMICONDUCTOR CORPORATION
- Current Assignee Address: JP Chiba
- Agency: Brinks Gilson & Lione
- Priority: JP2015-112308 20150602
- Main IPC: H03K5/135
- IPC: H03K5/135 ; H03K5/24

Abstract:
To provide a delay circuit improved in the accuracy of a delay time. A delay circuit is provided which includes a plurality of switches respectively provided between a plurality of constant current sources and a delay time adjustment terminal, a control circuit which ON/OFF-controls the switches, and a comparator circuit which compares a voltage of the delay time adjustment terminal and a reference voltage. The control circuit sequentially turns ON the switches every preset period after a signal is inputted to a signal input terminal and sets as a delay time, a time taken for the comparator circuit to detect that the voltage of the delay time adjustment terminal exceeds the reference voltage.
Public/Granted literature
- US20160359474A1 DELAY CIRCUIT AND SEMICONDUCTOR DEVICE Public/Granted day:2016-12-08
Information query
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