Invention Grant
- Patent Title: Advanced forming method and structure of local mechanical strained transistor
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Application No.: US15068233Application Date: 2016-03-11
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Publication No.: US09647111B2Publication Date: 2017-05-09
- Inventor: Chien-Hao Chen , Tze-Liang Lee
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/8238 ; H01L27/092 ; H01L29/16 ; H01L29/161 ; H01L21/28
Abstract:
Embodiments of the invention provide a semiconductor fabrication method and a structure for strained transistors. A method comprises forming a stressor layer over a MOS transistor. The stressor layer is selectively etched over the gate electrode, thereby affecting strain conditions within the MOSFET channel region. An NMOS transistor may have a tensile stressor layer, and a PMOS transistor may have compressive stressor layer.
Public/Granted literature
- US20160197183A1 Advanced Forming Method and Structure of Local Mechanical Strained Transistor Public/Granted day:2016-07-07
Information query
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