Invention Grant
- Patent Title: Wiring substrate and method of manufacturing the same
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Application No.: US15170313Application Date: 2016-06-01
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Publication No.: US09646926B2Publication Date: 2017-05-09
- Inventor: Yuji Kunimoto , Jun Furuichi , Noriyoshi Shimizu , Naoyuki Koizumi
- Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
- Applicant Address: JP Nagano-Shi
- Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
- Current Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
- Current Assignee Address: JP Nagano-Shi
- Agency: Rankin, Hill & Clark LLP
- Priority: JP2014-122705 20140613
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H01L23/498 ; H05K3/00 ; H05K3/46 ; H01L21/48 ; H01L21/56 ; H01L23/31 ; H01L25/065 ; H01L23/538 ; H01L23/552 ; H05K3/42 ; H01L21/60

Abstract:
A wiring substrate includes a first wiring layer including a first wiring part having a first wiring interval and a second wiring part having a second wiring interval wider than the first wiring interval, a metal plane layer formed on a portion of a first insulation layer formed on the first wiring layer, the first wiring part being located below the portion, a second insulation layer formed on the first insulation layer and the metal plane layer and having a first via hole and a second via hole, a second wiring layer formed on the second insulation layer and connected to the first wiring layer via a first via conductor formed in the first via hole, and a third wiring layer formed on the second insulation layer and connected to the metal plane layer via a second via conductor formed in the second via hole.
Public/Granted literature
- US20160276259A1 WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2016-09-22
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