Method and apparatus to facilitate direct surface cooling of a chip within a 3D stack of chips using optical interconnect
Abstract:
In one embodiment, the disclosure relates to a system of stacked and connected layers of circuits that includes at least one pair of adjacent layers having very few physical (electrical) connections. The system includes multiple logical connections. The logical interconnections may be made with light transmission. A majority of physical connections may provide power. The physical interconnections may be sparse, periodic and regular. The exemplary system may include physical space (or gap) between the a pair of adjacent layers having few physical connections. The space may be generally set by the sizes of the connections. A constant flow of coolant (gaseous or liquid) may be maintained between the adjacent pair of layers in the space.
Information query
Patent Agency Ranking
0/0