Invention Grant
- Patent Title: Method for manufacturing semiconductor device and semiconductor device
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Application No.: US15217599Application Date: 2016-07-22
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Publication No.: US09646908B2Publication Date: 2017-05-09
- Inventor: Soichi Homma , Masaya Shima , Yuusuke Takano , Takeshi Watanabe , Katsunori Shibuya
- Applicant: KABUSHIKI KAISHA TOSHIBA
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Patterson & Sheridan, LLP
- Priority: JP2015-145612 20150723
- Main IPC: H01L23/28
- IPC: H01L23/28 ; H01L23/31 ; H01L23/495 ; H01L25/065 ; H01L21/48 ; H01L21/56 ; H01L21/78 ; H01L21/52

Abstract:
In a method for manufacturing a semiconductor device, a resin layer including an inorganic filler is molded on a surface of a substrate which includes semiconductor elements attached thereto by an adhesive, and terminals electrically connected to the semiconductor elements on another surface thereof. The molded substrate is cut so as to expose a conductive body electrically connected to an external terminal maintainable at ground potential. The surface of the resin layer of the substrate is sputter-etched in a vacuum environment, in a state where a plurality of the cut substrates is provided in a tray so that the surface of the substrate faces the tray. A metal layer is sputtered so as to be electrically connected to the conductive body on the surface and the cut surface in a state where the substrate is provided in the tray while maintaining the vacuum environment after sputter-etching.
Public/Granted literature
- US20170025321A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE Public/Granted day:2017-01-26
Information query
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