Invention Grant
- Patent Title: Active regions with compatible dielectric layers
-
Application No.: US15351169Application Date: 2016-11-14
-
Publication No.: US09646822B2Publication Date: 2017-05-09
- Inventor: Pushkar Ranade
- Applicant: Pushkar Ranade
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: H01L21/02
- IPC: H01L21/02

Abstract:
A method to form a semiconductor structure with an active region and a compatible dielectric layer is described. In one embodiment, a semiconductor structure has a dielectric layer comprised of an oxide of a first semiconductor material, wherein a second (and compositionally different) semiconductor material is formed between the dielectric layer and the first semiconductor material. In another embodiment, a portion of the second semiconductor material is replaced with a third semiconductor material in order to impart uniaxial strain to the lattice structure of the second semiconductor material.
Public/Granted literature
- US20170062593A1 ACTIVE REGIONS WITH COMPATIBLE DIELECTRIC LAYERS Public/Granted day:2017-03-02
Information query
IPC分类: