Invention Grant
- Patent Title: Method of fabricating integrated circuit (IC) devices
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Application No.: US14798604Application Date: 2015-07-14
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Publication No.: US09646758B2Publication Date: 2017-05-09
- Inventor: Tak Ming Mak , Ajit M. Dubey
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Ditthavong & Steiner, P.C.
- Main IPC: H05K3/20
- IPC: H05K3/20 ; H01F27/28 ; H01F41/04 ; H01F27/29

Abstract:
Methods of coupling inductors in an IC device using interconnecting elements with solder caps and the resulting device are disclosed. Embodiments include forming a top inductor structure, in a top inductor area on a lower surface of a top substrate, the top inductor structure having first and second top terminals at its opposite ends; forming a bottom inductor structure, in a bottom inductor area on an upper surface of a bottom substrate, the bottom inductor structure having first and second bottom terminals at its opposite ends; forming top interconnecting elements on the lower surface of the top substrate around the top inductor area; forming bottom interconnecting elements on the upper surface of the bottom substrate around the bottom inductor area; forming solder bumps on lower and upper surfaces, respectively, of the top and bottom interconnecting elements; and connecting the top and bottom interconnecting elements to each other.
Public/Granted literature
- US20170018348A1 COUPLING INDUCTORS IN AN IC DEVICE USING INTERCONNECTING ELEMENTS WITH SOLDER CAPS AND RESULTING DEVICES Public/Granted day:2017-01-19
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